Category: AI Chips

  • Ultra-Low-Power Chip Lets Tiny Robots Create Real-Time 3D Maps for Navigation

    Ultra-Low-Power Chip Lets Tiny Robots Create Real-Time 3D Maps for Navigation

    MIT researchers have unveiled a new chip that could transform how tiny, battery-powered robots navigate complex environments. The chip, named Gleanmer, enables small autonomous vehicles and other power-limited devices to build detailed 3D maps of their surroundings in real time while consuming only about 6 milliwatts of power — roughly the same as a single LED.

    Traditional 3D mapping systems require significant memory and energy because they store and process every pixel from depth images. The MIT team took a different approach, combining an efficient algorithm with custom hardware to dramatically reduce both power and memory demands.

    How Gleanmer Works

    Instead of representing the environment with rigid cube-shaped voxels (3D pixels), the chip uses flexible ellipsoid shapes called Gaussians. These ellipsoids can be smoothly adjusted in size, shape, and thickness to match curved objects more efficiently than voxels. This compact representation captures both obstacles and free space, allowing a robot to plan collision-free paths without storing massive amounts of data.

    The researchers leveraged an algorithm developed in their lab called GMMap, which generates Gaussian-based maps from depth images in a single pass. By only comparing each pixel to its immediate neighbors, the algorithm avoids storing entire images at once — significantly reducing memory footprint.

    “At any point in time, we only need to store a few pixels in memory, which significantly reduces the memory footprint our algorithm requires,” said co-lead author Peter Zhi Xuan Li, an MIT graduate student.

    Co-Design for Maximum Efficiency

    As a robot moves, it often sees the same object from multiple angles, creating overlapping Gaussians. The chip fuses these overlapping shapes directly — without revisiting the original pixels — keeping the map compact. This principle extends throughout the design: most computations operate on compact Gaussians rather than raw pixels, enabling major energy savings.

    The hardware is built to keep active Gaussians in small, fast on-chip memory right next to the processing units. This eliminates the need to fetch data from distant, power-hungry off-chip storage.

    “By having a dedicated memory that just stores the objects you’ve seen in the previous few frames, you can access the data much more efficiently,” explained co-lead author Zih-Sing Fu.

    Real-World Testing and Future Applications

    The team tested Gleanmer on diverse 3D environments and live data from an iPhone camera. The chip generated accurate maps in real time while using just 2.5% of the power required by the best existing map-construction chip. It also allowed a simulated robot to plan safe trajectories using only about 20% of the energy it would otherwise need.

    Beyond robotics, the ultra-low-power operation makes the chip well-suited for lightweight augmented reality headsets that can be worn for extended periods — for applications like medical training simulations or detailed repair work.

    “Real-time 3D mapping has been the missing piece for small autonomous systems. A drone inspecting a pipeline or a pair of AR glasses navigating a room both need to understand the space around them — instantly, continuously, and at almost no power cost. Gleanmer makes that possible for the first time in a chip you can hold between your fingers,” said co-author Sertac Karaman, a professor of aeronautics and astronautics.

    The work was supported by the MIT-MathWorks Fellowship, Amazon, the U.S. National Science Foundation, and Intel. The paper was presented at the IEEE Very Large-Scale Integrated Circuits Symposium.

  • MIT’s 6-Milliwatt AI Chip Brings Real-Time 3D Mapping to Tiny Robots

    MIT’s 6-Milliwatt AI Chip Brings Real-Time 3D Mapping to Tiny Robots

    Researchers at MIT have unveiled a new system-on-a-chip that could revolutionize how tiny, low-power robots navigate complex environments. The chip, named Gleanmer, enables autonomous drones and other battery-limited devices to construct detailed 3D maps in real time using only about 6 milliwatts of power—roughly the energy of a single LED. This breakthrough, presented at the IEEE Very Large-Scale Integrated Circuits Symposium, promises to make small-scale robotics more capable and energy-efficient than ever.

    A Smarter Approach to 3D Mapping

    Traditional 3D mapping for robots relies on power-hungry systems that process and store thousands of 3D pixels (voxels) per image. The MIT team took a radically different approach by combining an efficient algorithm called GMMap with custom hardware optimized for its workload. Instead of using rigid cube-shaped voxels, GMMap represents obstacles and free space with flexible ellipsoidal blobs known as Gaussians. These shapes can stretch and shrink to match curved objects, storing far less data than traditional methods while still capturing accurate geometry.

    “This paper showcases a key example of how you can leverage co-design of the algorithm and hardware to really push energy efficiency,” says Vivienne Sze, a professor in EECS and senior author of the paper. “Our chip allows you to store very large maps in a very small space, and do it in a very energy efficient manner.”

    Hardware-Algorithm Co-Design at Its Best

    The chip’s efficiency stems from several clever optimizations. First, the GMMap algorithm processes each depth image in a single pass, comparing only neighboring pixels rather than all pixels in an image. This drastically reduces the amount of data that needs to be stored and retrieved. Second, as the robot moves and observes the same object from different angles, overlapping Gaussians are fused into a single compact representation without re-examining the original pixels. Because Gaussians are more compact than raw pixel data, this fusion process runs on-chip with minimal memory traffic.

    The hardware design keeps active Gaussians in small, fast on-chip memory right next to the processing units. “By having a dedicated memory that just stores the objects you’ve seen in the previous few frames, you can access the data much more efficiently,” explains co-lead author Zih-Sing Fu.

    Unmatched Energy Efficiency

    In tests, Gleanmer generated detailed 3D maps in real time while consuming only about 6 milliwatts of power—just 2.5 percent of what the best existing mapping chip requires. When used for path planning, the chip reuses compact Gaussians along the planned route, using only about 20 percent of the energy that conventional approaches would need.

    The low power consumption makes Gleanmer ideal not only for tiny drones inspecting HVAC systems or pipelines, but also for lightweight augmented reality headsets that require continuous environmental mapping for educational medical simulations or repair work. Sertac Karaman, a professor of aeronautics and astronautics and co-author, notes: “Real-time 3D mapping has been the missing piece for small autonomous systems. Gleanmer makes that possible for the first time in a chip you can hold between your fingers.”

    Looking Ahead

    The researchers plan to push energy efficiency even further by moving processing units closer to the sensors that gather environmental data. They are also exploring applications beyond robotics, such as using Gaussians to represent complex schematics for AI reasoning systems. This work was supported by the MIT-MathWorks Fellowship, Amazon, the U.S. National Science Foundation, and Intel.

  • India’s Pursuit of Semiconductor Self-Sufficiency: From Design Hub to Manufacturing Powerhouse

    India’s Pursuit of Semiconductor Self-Sufficiency: From Design Hub to Manufacturing Powerhouse

    India has long been a hidden force in global semiconductor design. Nearly 20% of the world’s chip design talent is based in the country, with engineers in Bangalore and Hyderabad playing a crucial role in creating the processors inside countless devices. However, designing a chip and manufacturing one are vastly different challenges. Until recently, India lacked the advanced fabrication plants—or fabs—needed to turn those designs into physical silicon.

    The COVID-19 pandemic delivered a harsh lesson about the fragility of global supply chains, disrupting car production and countless industries. That wake-up call has spurred India to move beyond its role as a design house and build a full-fledged chip manufacturing ecosystem. The India Semiconductor Mission (ISM) 2.0, backed by billions in government funding, represents the country’s most ambitious push yet to achieve this goal.

    A Strategic, Bottom-Up Approach

    Rather than trying to immediately compete with established leaders like Taiwan on cutting-edge 2-nanometer AI chips, India is pursuing a smarter, incremental strategy. The initial focus is on the third stage of production: Outsourced Semiconductor Assembly and Test (OSAT). This involves slicing raw silicon wafers into individual chips and packaging them—a process that is less capital-intensive than building a full fab but equally vital. Companies like Kaynes Semicon have already begun production in Gujarat, targeting chips for automobiles, telecommunications, and defense. These chips may not be as glamorous as those powering premium smartphones, but they are essential to the modern economy.

    Policy Support and Investment

    The government is backing this vision with substantial resources. The Union Budget for 2026-27 introduced ISM 2.0, allocating Rs. 8,000 crore specifically to support domestic manufacturing and design. By 2029, India aims to design and produce 70% to 75% of the chips it needs, from home appliances to advanced defense systems. Under the first phase, ten major projects—representing an investment of approximately Rs. 1.60 lakh crore—have been approved across six states. The plan positions India as a reliable ‘Plan B’ for global supply chains amid rising geopolitical tensions.

    Talent Development and Indigenous Innovation

    One of the biggest hurdles is the shortage of skilled workers for chip manufacturing, which demands extreme precision and meticulous documentation. To address this, India has launched training programs such as ‘Chips to Startup,’ providing high-end design tools to hundreds of universities and over 1,000 startup engineers. Partnerships with global firms like Lam Research aim to train 60,000 engineers in specialized manufacturing and cleanroom protocols over the next decade. Additionally, the development of indigenous microprocessors like DHRUV64, SHAKTI, and THEJAS demonstrates a push toward digital sovereignty. These open-source chips are more affordable and foster innovation in areas like 5G, automotive electronics, and industrial automation.

    Strategic Importance and Economic Impact

    Semiconductors have become the oil of the 21st century, powering everything from medical devices to satellite communications. India’s chip market is projected to grow from $38 billion in 2023 to $110 billion by 2030. Local production is not just an economic imperative but a matter of national security, ensuring the economy remains resilient during global crises or trade wars. The sector is also expected to create thousands of high-quality jobs for engineers and technicians, reducing brain drain and keeping India’s top talent engaged in cutting-edge technology.

    What Lies Ahead

    Progress is already visible. According to IT Minister Ashwini Vaishnaw, four semiconductor plants are expected to be operational by the end of 2026, with a facility in Sanand, Gujarat, moving from foundation to production in just 14 months—a pace that has impressed global observers. The country’s first major fabrication unit in Dholera, targeting advanced 3-nanometer and 2-nanometer technologies, is slated for completion by 2028. India’s journey is long and requires patient investment, but the pieces are falling into place. By combining world-class design talent with new manufacturing capabilities, the nation is steadily turning its semiconductor dreams into a reality. The government’s goal is to become one of the top three semiconductor nations by 2047.

  • Murakkab: New System Cuts AI Agent Energy Use and Cost by Over 70%

    Murakkab: New System Cuts AI Agent Energy Use and Cost by Over 70%

    Agentic workflows — AI-powered software systems that chain multiple models and tools to complete complex tasks — are becoming the backbone of cloud computing. But their fragmented design often wastes computation, energy, and money. Researchers from MIT and Microsoft have developed a new system called Murakkab that streamlines the design and deployment of these workflows, automatically optimizing them for speed, energy efficiency, and cost.

    With Murakkab, developers describe their application’s goal in plain language, and the system automatically selects the best AI models, tools, hardware configurations, and resource allocations. It adjusts these on the fly based on user priorities, such as minimizing costs or maximizing speed. In tests, Murakkab used only about 35% of the computation, 27% of the energy, and under 25% of the cost compared to traditional methods — without sacrificing performance.

    “Agentic workflows are getting very complicated and quickly becoming the backbone of what cloud providers are doing,” says Gohar Chaudhry, an MIT EECS graduate student and lead author of the paper presented at USENIX OSDI. “Energy usage is a huge concern, so we need to be very careful about how efficient these workflows are.”

    Murakkab also adapts dynamically when new models or hardware become available, eliminating the need for developers to manually reconfigure their systems. The researchers plan to expand the system to more complex workflows and larger computing clusters.

  • Trump’s Beijing Visit Opens Door for Nvidia Chips to Power Chinese AI Giants

    Trump’s Beijing Visit Opens Door for Nvidia Chips to Power Chinese AI Giants

    President Donald Trump’s recent trip to Beijing, accompanied by a delegation including Apple’s Tim Cook, Tesla’s Elon Musk, and Nvidia’s Jensen Huang, signals a potential reset in AI supply chains between the U.S. and China. The visit, focused on high-level negotiations, suggests a shift toward a transactional relationship where American semiconductor technology may support Chinese AI development.

    At the state banquet, President Xi Jinping emphasized the possibility of common cause between China’s rejuvenation goals and America’s “Make America Great Again” agenda. Behind the diplomatic smiles, however, lies a strategic contest: Beijing’s “new productive forces” policy prioritizes AI, advanced manufacturing, and robotics, exemplified by the transformation of Chongqing into a high-tech megacity. Yet China remains dependent on U.S.-controlled high-end accelerators for training frontier AI models.

    Nvidia’s Jensen Huang’s presence is particularly significant. After years of tightening export controls, Washington is now considering case-by-case reviews for advanced AI compute exports. Nvidia is positioned to ship H200 data center GPUs to major Chinese cloud platforms like Alibaba and Tencent. Although not the top-tier Blackwell-class chips, the H200 is roughly six times more powerful than any domestic Chinese alternative, potentially compressing AI training timelines for Chinese firms.

    For Apple and Tesla, the mission focuses on supply chain stability and regulatory clarity. Apple aims to protect its manufacturing resilience and consumer base, where the iPhone 17 has seen success. Tesla views China as crucial for production and full self-driving deployment, seeking clarity on mapping and data policies to compete with domestic rivals.

    This delegation represents an attempt to reverse the 20% decline in U.S. imports from China. By leveraging tech leaders for targeted access—compute in exchange for market openness and IP protections—both nations may enter a more transactional era. The true metrics of success will be the speed of Chinese hyperscalers building H200 clusters and the regulatory wins secured by Apple and Tesla. Ultimately, compute access shapes capability, and this visit suggests a hard-nosed accommodation that keeps the AI flywheel spinning on both sides of the Pacific.

  • IBM’s Sub-1nm Chip Breakthrough: Nanostack Architecture Ushers in New Era for AI Computing

    IBM’s Sub-1nm Chip Breakthrough: Nanostack Architecture Ushers in New Era for AI Computing

    IBM has unveiled the world’s first sub-1nm chip technology, introducing a new three-dimensional Nanostack architecture designed for next-generation AI computing. The breakthrough promises higher performance, lower power consumption, and could reshape the future of semiconductor innovation across cloud computing, electronics, and advanced AI applications.

    Built on a 0.7nm (7 angstroms) process, the prototype vertically stacks transistors rather than relying solely on shrinking them. IBM said the technology is designed to support increasingly demanding workloads in artificial intelligence, cloud computing, and high-performance computing. As transistors approach atomic dimensions, continuing that trend through conventional scaling has become increasingly difficult because of power, heat, and manufacturing constraints.

    “The next frontier of semiconductor innovation isn’t just about making things smaller, it’s about rethinking how chips are built from the ground up,” IBM said in the announcement. The company noted that the technology marks the beginning of semiconductor development where transistor dimensions are measured in angstroms rather than nanometres. One angstrom is one-tenth of a nanometre, making the new technology a 7-angstrom node. To illustrate the scale, IBM noted that a human red blood cell is about 7,000 nanometres wide, roughly 10,000 times larger than the chip’s 0.7nm transistor node.

    IBM said the new chip packs nearly 100 billion transistors into an area roughly the size of a fingernail, almost twice the transistor density of its 2nm technology introduced in 2021. According to the company, the sub-1nm design can deliver up to 50% higher performance at the same power level, or up to 70% lower power consumption while maintaining the same performance, compared with its 2nm technology.

    “The era of simple scaling is over,” IBM said, adding that “future breakthroughs will come from integrating materials, devices, and architectures in entirely new ways.” IBM claimed that the technology can find applications in artificial intelligence, cloud computing, edge computing, cell phones, and other future electronics, where better performance with lower power consumption becomes increasingly crucial.

    IBM has led the world in developing the chips that power computing systems for decades, from early semiconductors in the 1960s to the world’s first 2nm node chip. The company also recently announced a plan to form Anderon, the world’s first pure-play quantum foundry.

    “IBM’s latest chip breakthrough marks a landmark moment in computing, pushing technology beyond the nanometer era to the scale of atoms. With our new nanostack architecture, we’re not just making smaller transistors; we’re reinventing how chips are built to deliver dramatically more power and energy efficiency,” said Jay Gambetta, Director of IBM Research and IBM Fellow. “This industry-first innovation continues IBM’s legacy of leading in next-generation technologies and sets the foundation for the next era of computing,” he added.

    IBM’s sub-1nm achievement underscores how semiconductor innovations continue to set new benchmarks for technology. With increasing demand for AI applications, semiconductor innovations can drive advancements in computing speed, energy efficiency, and other areas across the medical field, robotics, and beyond.

  • Micron Locks in $22 Billion AI Chip Deals with NVIDIA to Break Memory Market Cycles

    Micron Locks in $22 Billion AI Chip Deals with NVIDIA to Break Memory Market Cycles

    Memory chipmakers are rewriting their playbook. Long treated as interchangeable commodities, memory chips forced suppliers into brutal boom-bust cycles. Now, with AI demand surging, Micron Technology has secured $22 billion in multi-year commitments from customers like NVIDIA — a move designed to stabilize cash flow and shield production from market volatility.

    The agreements follow similar long-term deals by rivals SK Hynix and Samsung. Under these “take-or-pay” contracts, clients must either purchase chips or pay up anyway. Micron’s Chief Business Officer Sumit Sadana told Reuters that billions of dollars have been placed on Micron’s balance sheet as a show of confidence in the new business model.

    While the deals provide visibility and validate the AI demand narrative, analysts warn that the strategy remains a gamble. Memory stocks stay vulnerable to sudden downturns, and any cooling of AI demand could send buyers back to the negotiating table. Micron itself posted a $5.3 billion loss in 2023 when consumer electronics spending collapsed.

    Investors are watching whether Micron’s pricing power can last. The company argues that these long-term contracts push financial risk further into the future and turn chipmakers into strategic partners rather than commodity suppliers. New factory expansions will now require collaborative customer funding, keeping supplies tight until at least 2027.